In server systems, there are backup chips (or in multi-core processors, backup cores) that are continuously powered on. These backup chips and cores are ready to start computation if the initial working chip or core, as the case may be, experiences errors due to hardware failure or single event upsets, and/or if there is a spike in workload. Hence, they cannot be powered off while not being used, as latency time to bring them up can be quite large (several million clock cycles) compared to the expected response time of a few clock cycles. Even though the backup chips are powered on, they are not operating, as this would result in a large amount of wasted power consumption. Furthermore, they are also experiencing temperatures typical of the entire system. Hence, these backup chips, cores, and/or circuits are degraded by NBTI and PBTI mechanisms since they are powered on at high temperature.
FIG. 1 shows a p-type MOSFET 1100 with a grounded gate and the left-hand drain-source terminal at voltage VDD, i.e., an NBTI stress condition. FIG. 2 shows an n-type MOSFET 1200 with gate at voltage VDD and the left-hand drain-source terminal grounded, i.e., a PBTI stress condition. NBTI leads to an increase in absolute value of PMOS threshold voltage (Vt) and PBTI leads to an increase in absolute value of NMOS threshold voltage (Vt). Increase in threshold-voltage is also referred to as degradation because performance of a MOSFET is reduced thereby.